lkml.org 
[lkml]   [2012]   [Jun]   [8]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support v2

    * Andi Kleen <andi@firstfloor.org> wrote:

    > From: Andi Kleen <ak@linux.intel.com>
    >
    > Very similar to Sandy Bridge, but there is no PEBS problem.
    >
    > As Stephane pointed out .code=0xb1, .umask=0x01 is gone, so don't
    > do a generic backend stall event on IvyBridge.
    >
    > v2: Remove stall event
    > Signed-off-by: Andi Kleen <ak@linux.intel.com>
    > ---
    > arch/x86/kernel/cpu/perf_event_intel.c | 19 ++++++++++++++-----
    > 1 files changed, 14 insertions(+), 5 deletions(-)
    >
    > diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
    > index 166546e..0f58590 100644
    > --- a/arch/x86/kernel/cpu/perf_event_intel.c
    > +++ b/arch/x86/kernel/cpu/perf_event_intel.c
    > @@ -1698,6 +1698,7 @@ __init int intel_pmu_init(void)
    > union cpuid10_ebx ebx;
    > unsigned int unused;
    > int version;
    > + char *name;
    >
    > if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
    > switch (boot_cpu_data.x86) {
    > @@ -1839,9 +1840,21 @@ __init int intel_pmu_init(void)
    > pr_cont("Westmere events, ");
    > break;
    >
    > + case 58: /* IvyBridge */
    > + name = "Ivy";
    > + /* No backend stall event */
    > + goto snb_ivb_common;
    > +
    > case 42: /* SandyBridge */
    > x86_add_quirk(intel_sandybridge_quirk);
    > case 45: /* SandyBridge, "Romely-EP" */
    > + name = "Sandy";
    > +
    > + /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
    > + intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
    > + X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);
    > +
    > + snb_ivb_common:
    > memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
    > sizeof(hw_cache_event_ids));
    >
    > @@ -1857,11 +1870,7 @@ __init int intel_pmu_init(void)
    > /* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
    > intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
    > X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
    > - /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
    > - intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
    > - X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);
    > -
    > - pr_cont("SandyBridge events, ");
    > + pr_cont("%sBridge events, ", name);
    > break;

    First round review feedback: your patch does not apply to the
    perf development/fixes tree (-tip), please send one that will.

    Thanks,

    Ingo


    \
     
     \ /
      Last update: 2012-06-08 11:21    [W:0.051 / U:0.736 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site