Messages in this thread | | | Subject | Re: [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading counters | From | Peter Zijlstra <> | Date | Wed, 06 Jun 2012 16:38:44 +0200 |
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On Wed, 2012-06-06 at 16:33 +0200, Stephane Eranian wrote: > Yes, his patch did but somehow I don't see this code in tip-x86. > The thing that I would worry about between rdmsrl() and rdpmc() > is what happens to the upper bits. rdpmc() returns bits [N-1:0] of > the N-bit counters. N is 48 (or 40) nowadays. When you read 64 bit > worth, what do you get in bits [63:N]? are those sign-extended or > zero-extended. Is that the same behavior across all Intel and AMD > processors? With perf_events, I think the (N-1)th bit is always set. > Queued his patch after I saw Andi's trainwreck -- had totally forgotten about it :/
For the kernel it doesn't matter, we manually sign-extend for however many bits the counter has.
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