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    SubjectRe: [PATCH] perf, x86: Fix Intel shared extra MSR allocation
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    On Wed, Jun 6, 2012 at 12:53 PM, Peter Zijlstra <peterz@infradead.org> wrote:
    > On Wed, 2012-06-06 at 12:36 +0200, Peter Zijlstra wrote:
    >> On Wed, 2012-06-06 at 12:35 +0200, Stephane Eranian wrote:
    >> > Ok, I found the problem. It was in intel_fixup_er().
    >> > Unlike in the original code, this routine must update
    >> > the event->extra_reg.idx to the idx parameter instead
    >> > of trying to swap out from it.
    >>
    >> Ah indeed. Thanks!
    >
    >
    > static void intel_fixup_er(struct perf_event *event, int idx)
    > {
    >        event->hw.extra_reg.idx = idx;
    >
    >        if (idx == EXTRA_REG_RSP_0) {
    >                event->hw.config &= ~INTEL_ARCH_EVENT_MASK;
    >                event->hw.config |= 0x01b7;
    >                event->hw.extra_reg.reg = MSR_OFFCORE_RSP_0;
    >        } else if (idx == EXTRA_REG_RSP_1) {
    >                event->hw.config &= ~INTEL_ARCH_EVENT_MASK;
    >                event->hw.config |= 0x01bb;
    >                event->hw.extra_reg.reg = MSR_OFFCORE_RSP_1;
    >        }
    > }
    >
    > Like that then?


    Are you going to repost the update patch, or shall I?
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