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SubjectRe: [patch 2/2] x86: mce: Implement cmci poll mode for intel machines
On Wed, 6 Jun 2012, Chen Gong wrote:
> 于 2012/6/5 21:35, Thomas Gleixner 写道:
> I add some print in timer callback, it shows:
>
> smp_processor_id() = 0, mce_timer_fn data(CPU id) = 10
> timer->function = ffffffff8102c200, timer pending = 1, CPU = 0
> (add_timer_on, BUG!!!)

Sure. That's not a surprise. The timer function for cpu 10 is called
on cpu 0. And the timer function does:

struct timer_list *t = &__get_cpu_var(mce_timer);

which gets a pointer to the timer of cpu0. And that timer is
pending. So yes, it's exploding for a good reason.

Though, this does not tell us how the timer of cpu10 gets on cpu0.

Did you do any cpu hotplug operations ?

> > @@ -1305,13 +1305,14 @@ void mce_timer_kick(unsigned long interv
> > unsigned long when = jiffies + interval;
> > unsigned long iv = __this_cpu_read(mce_next_interval);
> >
> > - if (time_before(when, t->expires) && timer_pending(t)) {
> > - mod_timer(t, when);
> > - } else if (!mce_next_interval) {
> > - t->expires = round_jiffies(jiffies + iv);
> > + if (timer_pending(t)) {
> > + if (time_before(when, t->expires))
> > + mod_timer(t, when);
> > + } else {
> > + t->expires = round_jiffies(jiffies + when);
>
> should be "t->expires = round_jiffies(when);"

True.

> > add_timer_on(t, smp_processor_id());
> > }
> > - if (interval < iv)
> > + if (interval > iv)
> > __this_cpu_write(mce_next_interval, iv);
> > }
> >
> Strange, anyway, mce_next_interval should be updated in proper way, but
> if using above logic, mce_next_interval doesn't make change. I prefer
> if (interval < iv)
> __this_cpu_write(mce_next_interval, interval);

Grr. you are right. Stupid me.

> In fact, during my test, I wrote the similar codes to do the test, but
> it can't fix the bug. The logic here is not the key, no matter how you set
> timer, you can get a poll timer. The issue happens in the timer function
> itself. Once timer callback is entered, the issue happens every time.
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