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SubjectRe: [PATCH 4/5] x86: Allow nesting of the debug stack IDT setting
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On Thu, 2012-05-31 at 13:17 -0700, H. Peter Anvin wrote:

> Ouch. This is really way more complex than it has any excuse for being,
> and it's the complexity that concerns me, not the performance.

Complexity is my Sun, and I am the planet that orbits around it.

>
> I'd like a chart, or list, of the alternate stack environments we can be
> in and what can transfer to what. I think there might be an easier
> solution that is more robust.

Well, it's not as bad as one might think:

#define STACKFAULT_STACK 1
#define DOUBLEFAULT_STACK 2
#define NMI_STACK 3
#define DEBUG_STACK 4
#define MCE_STACK 5
#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
These are the exceptions that have their own stacks.

arch/x86/kernel/traps.c: set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
arch/x86/kernel/traps.c: set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
arch/x86/kernel/traps.c: set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
arch/x86/kernel/traps.c: set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
arch/x86/kernel/traps.c: set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
arch/x86/kernel/traps.c: set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);

We only have two IDT tables that are fixed and are switched via the NMI
handler (debug_stack_set_zero), as well as this patch set.

head_64.S:

ENTRY(idt_table)
.skip IDT_ENTRIES * 16

.align L1_CACHE_BYTES
ENTRY(nmi_idt_table)
.skip IDT_ENTRIES * 16


Only the DEBUG stack has a double size:

arch/x89/kernel/cpu/common.c:

static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ,
[DEBUG_STACK - 1] = DEBUG_STKSZ
};

Thus only the debug stack does the stack TSS trick.

Is this what you were looking for? (God, it just shows how much time
I've been spending on this crap, as I was able to find all this by
memory and not grepping for it :-p )

-- Steve




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