Messages in this thread | | | Subject | Re: [PATCH 7/9] perf: Add Sandy Bridge-EP uncore support | From | Peter Zijlstra <> | Date | Thu, 03 May 2012 23:12:16 +0200 |
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Let's keep the names as they're listed in the Intel doc:
On Wed, 2012-05-02 at 10:07 +0800, Yan, Zheng wrote: > +static struct intel_uncore_type snbep_uncore_ubox = { > + .name = "ubox",
"U-Box"
> +}; > + > +static struct intel_uncore_type snbep_uncore_cbo = { > + .name = "cbo",
"C-Box"
> +}; > + > +static struct intel_uncore_type snbep_uncore_pcu = { > + .name = "pcu",
"PCU"
> +};
> +static struct intel_uncore_type snbep_uncore_ha = { > + .name = "ha",
"HA"
> +}; > + > +static struct intel_uncore_type snbep_uncore_imc = { > + .name = "imc",
"iMC"
> +}; > + > +static struct intel_uncore_type snbep_uncore_qpi = { > + .name = "qpi",
"QPI"
> +}; > + > + > +static struct intel_uncore_type snbep_uncore_r2pcie = { > + .name = "r2pcie",
"R2PCIe"
> +}; > + > +static struct intel_uncore_type snbep_uncore_r3qpi = { > + .name = "r3qpi",
"R3QPI"
> +};
These last two are the P-Boxes ? The figure (1-1) lists a 3rd P-box covering the SMI channels, the table (1-1) doesn't list it though.
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