Messages in this thread |  | | | Date | Wed, 02 May 2012 11:13:23 -0400 | | From | Rik van Riel <> | | Subject | Re: [PATCH 1/3] x86/tlb_info: get last level TLB entry number of CPU |
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On 04/28/2012 04:50 AM, Alex Shi wrote: > For 4KB pages, x86 CPU has 2 or 1 level TLB, first level is data TLB and > instruction TLB, second level is shared TLB for both data and instructions. > > For hupe page TLB, usually there is just one level and seperated by 2MB/4MB > and 1GB. > > Although each levels TLB size is important for performance tuning, but for > genernal and rude optimizing, just last level TLB entry number is suitable. > And in fact, last level TLB has the biggest entry number. > > This patch will get the biggest TLB entry number and use it in furture TLB > optimizing. > > Signed-off-by: Alex Shi<alex.shi@intel.com>
Acked-by: Rik van Riel <riel@redhat.com>
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