Messages in this thread | | | Date | Sat, 21 Apr 2012 01:22:08 -0300 | From | Marcelo Tosatti <> | Subject | Re: [PATCH v3 4/9] KVM: MMU: introduce SPTE_ALLOW_WRITE bit |
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On Sat, Apr 21, 2012 at 11:30:55AM +0800, Xiao Guangrong wrote: > On 04/21/2012 05:39 AM, Marcelo Tosatti wrote: > > > >> @@ -1177,9 +1178,8 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp, > >> new_spte = *sptep & ~PT64_BASE_ADDR_MASK; > >> new_spte |= (u64)new_pfn << PAGE_SHIFT; > >> > >> - new_spte &= ~PT_WRITABLE_MASK; > >> - new_spte &= ~SPTE_HOST_WRITEABLE; > >> - new_spte &= ~shadow_accessed_mask; > >> + new_spte &= ~(PT_WRITABLE_MASK | SPTE_HOST_WRITEABLE | > >> + shadow_accessed_mask | SPTE_ALLOW_WRITE); > > > > Each bit should have a distinct meaning. Here the host pte is being > > write-protected, which means only the SPTE_HOST_WRITEABLE bit > > should be cleared. > > > Hmm, it is no problem if SPTE_ALLOW_WRITE is not cleared. > > But the meaning of SPTE_ALLOW_WRITE will become strange: we will see a > spte with spte.SPTE_ALLOW_WRITE = 1 (means the spte is writable on host > and guest) and spte.SPTE_HOST_WRITEABLE = 0 (means the spte is read-only > on host).
You are combining gpte writable bit, and host pte writable bit (which are separate and independent of each other) into one bit.
SPTE_HOST_WRITEABLE already indicates whether the host pte is writable or not.
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