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    SubjectRe: [PATCH] x86: use enum instead of literals for trap values
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    On Fri, Mar 9, 2012 at 11:08 AM, Borislav Petkov <bp@amd64.org> wrote:
    > On Fri, Mar 09, 2012 at 10:54:19AM -0800, Kees Cook wrote:
    >> On Fri, Mar 9, 2012 at 10:28 AM, Borislav Petkov <bp@amd64.org> wrote:
    >> > On Fri, Mar 09, 2012 at 10:21:52AM -0800, Kees Cook wrote:
    >> >> > I have to admit personally to prefer something like X86_XCP_XX where XX
    >> >> > is the two-letter code that the Intel documentation uses for that trap,
    >> >> > i.e. #GP, #BR, #MC and so on.
    >> >>
    >> >> We need a single person to decide on this bike shed color. :) If the
    >> >> list of enum names can be agreed on, I'll be happy to do the
    >> >> search/replace for it.
    >> >
    >> > Well,
    >> >
    >> > here are my 2¢: I agree with hpa because
    >> >
    >> > a) it maps the CPU vendor documentation
    >> > b) it is nicely short
    >>
    >> How about:
    >>
    >> X86_XCP_DE = 0,         /* 0, Divide-by-zero */
    >> X86_XCP_DB,             /* 1, Debug */
    >> X86_XCP_NMI,            /* 2, Non-maskable Interrupt */
    >> X86_XCP_BP,             /* 3, Breakpoint */
    >> X86_XCP_OF,             /* 4, Overflow */
    >> X86_XCP_BR,             /* 5, Bound Range Exceeded */
    >> X86_XCP_UD,             /* 6, Invalid Opcode */
    >> X86_XCP_NM,             /* 7, Device Not Available */
    >> X86_XCP_DF,             /* 8, Double Fault */
    >> X86_XCP_OLD_MF,         /* 9, Coprocessor Segment Overrun */
    >> X86_XCP_TS,             /* 10, Invalid TSS */
    >> X86_XCP_NP,             /* 11, Segment Not Present */
    >> X86_XCP_SS,             /* 12, Stack-Segment Fault */
    >> X86_XCP_GP,             /* 13, General Protection Fault  */
    >> X86_XCP_PF,             /* 14, Page Fault */
    >> X86_XCP_RES,            /* 15, Reserved */
    >
    > So is this reserved or are we using it for Spurious IRQs? If we use it,
    > then 'RES' is a bad name. Maybe we define our own like
    >
    > X86_VEC_SP

    Yeah, it's used for spurious.

    > and then do
    >
    > X86_VEC_IR for IRET
    >
    > in the manner we assumed for the rest?

    Sure. I wasn't sure if it was dangerous to take a two-letter combo. I
    guess if there is a future collision, we can just solve it then.

    >> X86_XCP_MF,             /* 16, x87 Floating-Point Exception */
    >> X86_XCP_AC,             /* 17, Alignment Check */
    >> X86_XCP_MC,             /* 18, Machine Check */
    >> X86_XCP_XM,             /* 19, SIMD Floating-Point Exception */
    >
    > Shouln't this be #XF actually? At least it is so in the AMD docs.

    XM in Intel, XF in AMD. I have no preference.

    >> X86_XCP_IRET = 32,      /* 32, IRET Exception */
    >>
    >> There is a name collision for "MF", there's no mnemonic for NMI,
    >
    > Well, in the AMD docs we actually do have the '#NMI' mnemonic in use.

    If AMD's list is more complete, I think that's a good enough reason to
    use "XF" above. :)

    >> IRET, or the reserved "spurious" interrupt.
    >>
    >> Can use "VEC" instead "XCP", as Steven suggests.
    >
    > Yeah, because those actually are fixed interrupt vectors, as they're
    > called in the AMD docs. Makes sense.

    That seems reasonable to me. Peter, how's that sound to you?

    -Kees

    --
    Kees Cook
    ChromeOS Security
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