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    Subject[PATCH 7/8 v7] drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers
    Date
    The POSTING_READ() calls were originally added to make sure the writes
    were flushed before any timing delays and across loops.
    Now that the code has settled a bit, let's remove them.

    Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
    ---
    drivers/gpu/drm/i915/intel_i2c.c | 3 ---
    1 files changed, 0 insertions(+), 3 deletions(-)

    diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
    index 60f90cb..73431ed 100644
    --- a/drivers/gpu/drm/i915/intel_i2c.c
    +++ b/drivers/gpu/drm/i915/intel_i2c.c
    @@ -217,7 +217,6 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
    (len << GMBUS_BYTE_COUNT_SHIFT) |
    (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
    GMBUS_SLAVE_READ | GMBUS_SW_RDY);
    - POSTING_READ(GMBUS2 + reg_offset);
    do {
    int ret;
    u32 val, loop = 0;
    @@ -261,7 +260,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
    (msg->len << GMBUS_BYTE_COUNT_SHIFT) |
    (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
    GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
    - POSTING_READ(GMBUS2 + reg_offset);
    while (len) {
    int ret;
    u32 gmbus2;
    @@ -272,7 +270,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
    } while (--len && ++loop < 4);

    I915_WRITE(GMBUS3 + reg_offset, val);
    - POSTING_READ(GMBUS2 + reg_offset);

    ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
    (GMBUS_SATOER | GMBUS_HW_RDY),
    --
    1.7.7.3


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