Messages in this thread | | | From | Chris Wilson <> | Subject | Re: [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions | Date | Wed, 28 Mar 2012 19:52:16 +0100 |
| |
On Thu, 29 Mar 2012 02:26:37 +0800, Daniel Kurtz <djkurtz@chromium.org> wrote: > It is very common for an i2c device to require a small 1 or 2 byte write > followed by a read. For example, when reading from an i2c EEPROM it is > common to write and address, offset or index followed by a reading some > values.
Hmm, I have
"gmbus1, bits 8-15: 8-bit GMBUS slave register This field is redundant and should not be used."
Scary. :)
Otherwise, the code itself looks correct and quite neatly done now. -Chris
-- Chris Wilson, Intel Open Source Technology Centre
| |