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SubjectRe: [git pull] drm main pull for 3.4-rc1
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On 27/03/12 11:11, Tony Vroon wrote:
> No DMAR complaints in dmesg yet; it would have crashed by now if
> the fault was present.

To confirm, it is stable.
So ppgtt + VT-d is problematic on:
00:02.0 VGA compatible controller [0300]: Intel Corporation 2nd
Generation Core Processor Family Integrated Graphics Controller
[8086:0126] (rev 09) (prog-if 00 [VGA controller])
Subsystem: Fujitsu Limited. Device [10cf:15e9]
Flags: bus master, fast devsel, latency 0, IRQ 42
Memory at e0000000 (64-bit, non-prefetchable) [size=4M]
Memory at d0000000 (64-bit, prefetchable) [size=256M]
I/O ports at 3000 [size=64]
Expansion ROM at <unassigned> [disabled]
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Capabilities: [d0] Power Management version 2
Capabilities: [a4] PCI Advanced Features
Kernel driver in use: i915

For the avoidance of doubt, it is a mobile Core i7 part:
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz
stepping : 7
microcode : 0x25

Prior to the crash, I see:
DRHD: handling fault status reg 3
DMAR:[DMA Write] Request device [00:02.0] fault addr 12806b000
DMAR:[fault reason 05] PTE Write access is not set
DRHD: handling fault status reg 3
DMAR:[DMA Write] Request device [00:02.0] fault addr 128183000
DMAR:[fault reason 05] PTE Write access is not set
DRHD: handling fault status reg 3
DMAR:[DMA Write] Request device [00:02.0] fault addr 4147562000
DMAR:[fault reason 05] PTE Write access is not set
DRHD: handling fault status reg 3
DMAR:[DMA Write] Request device [00:02.0] fault addr 4147562000
DMAR:[fault reason 05] PTE Write access is not set

So I believe a bisection should point at commit
e21af88d39796c907c38648c824be3d646ffbe35, but I am willing to run one
if you really feel there is more to it?

Regards,
- --
Tony Vroon
UNIX systems administrator
London Internet Exchange Ltd, Trinity Court, Trinity Street,
Peterborough, PE1 1DA
Registered in England number 3137929
E-Mail: tony@linx.net
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