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    SubjectRe: [PATCH V2 5/6] dt: Document Tegra20/30 pinctrl binding
    On 03/21/2012 10:00 PM, Dong Aisheng wrote:
    > On Wed, Mar 21, 2012 at 11:57:14PM +0800, Stephen Warren wrote:
    >> On 03/21/2012 03:19 AM, Dong Aisheng wrote:
    >>> On Wed, Mar 21, 2012 at 01:44:38AM +0800, Stephen Warren wrote:
    >>>> Define a new binding for the Tegra pin controller, which is capable of
    >>>> defining all aspects of desired pin multiplexing and pin configuration.
    >>>> This is all based on the new common pinctrl bindings.
    >>>>
    >>>> Add Tegra30 binding based on Tegra20 binding.
    ...
    >>>> +Example board file extract:
    >>>> +
    >>>> + pinctrl@70000000 {
    >>>> + sdmmc4_default: pinmux {
    >>>> + sdmmc4_clk_pcc4 {
    >>>> + nvidia,pins = "sdmmc4_clk_pcc4",
    >>>> + "sdmmc4_rst_n_pcc3";
    >>>> + nvidia,function = "sdmmc4";
    >>>> + nvidia,pull = <0>;
    >>>> + nvidia,tristate = <0>;
    >>>> + };
    >>>> + sdmmc4_dat0_paa0 {
    >>>> + nvidia,pins = "sdmmc4_dat0_paa0",
    >>>> + "sdmmc4_dat1_paa1",
    >>>> + "sdmmc4_dat2_paa2",
    >>>> + "sdmmc4_dat3_paa3",
    >>>> + "sdmmc4_dat4_paa4",
    >>>> + "sdmmc4_dat5_paa5",
    >>>> + "sdmmc4_dat6_paa6",
    >>>> + "sdmmc4_dat7_paa7";
    >>>> + nvidia,function = "sdmmc4";
    >>>> + nvidia,pull = <2>;
    >>>> + nvidia,tristate = <0>;
    >>>
    >>> It seems it does not support per pin config for tegra30 and we have to
    >>> separate them in different nodes with same group config value, right?
    >>
    >> Sorry, I don't understand the question.
    >
    > I meant for tegra, the config(not mux) in one pinctrl node functions
    > on all entities in nvidia,pins, IOW, all pin or group must have the
    > same config.
    > So we can not set them differently in one node.
    >
    > For example, considering if sdmmc4_dat0_paa0 is nvidia,pull <0>
    > while sdmmc4_dat1_paa1 is nvidia,pull <1>.
    > Then we need to separate them in different pinctrl nodes, right?

    Yes, that's true.

    However, note that you can have more than one node affecting a
    particular pin or group if you want. For example, you could have one set
    of nodes that sets the mux, another set of nodes that sets
    pullup/down/none, another set that sets tristate/driven. That way,
    within each set of nodes, you get to group together all pins with
    similar properties. This is all because we take the list of affected
    pins/groups from the nvidia,pins property, rather than e.g. the node
    name, so it's possible to list the same pin/group in multiple nodes. An
    example from the Tegra Harmony board file:

    There's one node for each mux function that's used, specifying which
    pins/groups it's used on:

    ata {
    pins = "ata";
    function = "ide";
    };
    atb {
    nvidia,pins = "atb", "gma", "gme";
    nvidia,function = "sdio4";
    };
    ... many other nodes for other functions

    There's also one node for each combination of pull and tristate that's
    used, specifying which pins/groups it's used on:

    conf_ata {
    nvidia,pins = "ata", "atb", "atc", "atd", "ate",
    "cdev1", "dap1", "dtb", "gma", "gmb",
    "gmc", "gmd", "gme", "gpu7", "gpv",
    "i2cp", "pta", "rm", "slxa", "slxk",
    "spia", "spib";
    nvidia,pull = <0>;
    nvidia,tristate = <0>;
    };
    ... many other nodes for other pull/tristate combinations

    I ran a script to group the various pins into nodes in different ways,
    and this particular combination seemed to generate the smallest device
    tree source file for Harmony.


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