Messages in this thread | | | Date | Wed, 21 Mar 2012 23:26:22 +0100 | From | Sascha Hauer <> | Subject | Re: [PATCH 4/4] clk: wm831x: Add initial WM831x clock driver |
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On Wed, Mar 21, 2012 at 08:01:22PM +0000, Mark Brown wrote: > The WM831x and WM832x series of PMICs contain a flexible clocking > subsystem intended to provide always on and system core clocks. It > features: > > - A 32.768kHz crystal oscillator which can optionally be used to pass > through an externally generated clock. > - A FLL which can be clocked from either the 32.768kHz oscillator or > the CLKIN pin. > - A CLKOUT pin which can bring out either the oscillator or the FLL > output. > - The 32.768kHz clock can also optionally be brought out on the GPIO > pins of the device. > > This driver fully supports the 32.768kHz oscillator and CLKOUT. The FLL > is supported only in AUTO mode, the full flexibility of the FLL cannot > currently be used. > > Due to a lack of access to systems where the core SoC has been converted > to use the generic clock API this driver has been compile tested only. > > Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> > ---
[...]
> + > +static unsigned long wm831x_clkout_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + return parent_rate; > +}
You should be able to drop this. The clock framework will use the parent rate automatically if recalc_rate is not present.
> + > +static int wm831x_clkout_set_parent(struct clk_hw *hw, u8 parent) > +{ > + struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk, > + clkout_hw); > + struct wm831x *wm831x = clkdata->wm831x; > + > + if (parent > ARRAY_SIZE(wm831x_clkout_parents)) > + return -EINVAL;
Unless you mistrust the clock framework isn't necessary. The framework checks this already.
> + > +static __devinit int wm831x_clk_probe(struct platform_device *pdev) > +{ > + struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); > + struct wm831x_clk *clkdata; > + int ret; > + > + clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL); > + if (!clkdata) > + return -ENOMEM; > + > + /* XTAL_ENA can only be set via OTP/InstantConfig so just read once */ > + ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2); > + if (ret < 0) { > + dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n", > + ret); > + return ret; > + } > + clkdata->xtal_ena = ret & WM831X_XTAL_ENA; > + > + if (!clk_register(&pdev->dev, "xtal", &wm831x_xtal_ops, > + &clkdata->xtal_hw, NULL, 0, CLK_IS_ROOT)) > + return -EINVAL;
The clock names are unique identifiers for the clock, so clocks in drivers should probably have dev_name encoded into them.
You could also use the fixed rate generic clock here.
Sascha
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