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    SubjectRe: [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter
    2012年2月22日10:59 Darren Hart <>:
    > This series does some minor clean-up to the pch_uart driver, adds support
    > for the Fish River Island II UART clock, and introduces a user_uartclk
    > parameter to aid in developing for early and changing hardware.
    > Note that this series is my proposed alternative solution to that provided
    > by Tomoya MORNIAGA and Feng Tang which drops the board quirks and opts to
    > assume a 192 MHz clock on all boards. The problem with this approach is
    > that the CLKCFG register may have been set to something other than the
    > 192MHz configuration by the firmware. If so, then the pch_uart will send
    > garbage between the time the boot console is disabled and the pch_phub
    > sets the CLKCFG register again. In my case, the pch_phub PCI probe occurs
    > after the pch_uart_console_setup. Even if it happened before, the output
    > up until the PCI probing would be garbage.
    > In order to support an early serial console, we cannot rely on the pch_phub
    > probe function to setup the CFGCLK register. This series relies on the board
    > quirks and doesn't force the setting of the CLKREG in the pch_phub code.
    > Instead, it aligns with what is the default configuration (defined by firmware)
    > for a given board. The user_uartclk provides a mechanism to force a specific
    > uartclk if necessary.

    I think UART console function(including "early serial console") is
    used for debug use.

    So, if people who want to see the boot log correctly before pch_phub installed,
    the people have only to do configure uart_clock by themselves.

    So, I think default uart_clock 192MHz setting is better than Darren's opinion.

    Let me know your opinion.


    ROHM Co., Ltd.

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