Messages in this thread | | | From | Alok Chauhan <> | Date | Fri, 10 Feb 2012 14:50:22 +0530 | Subject | RE: [PATCH v2] i2c: tegra: Add delay before reset the controller |
| |
> On Mon, Dec 26, 2011 at 04:44:41PM +0530, Alok Chauhan wrote: >> > + /* > + * In NACK error condition resetting of I2C controller happens > + * before STOP condition is properly completed by I2C controller, > + * so wait for 2 clock cycle to complete STOP condition. > + */ > + if (i2c_dev->msg_err == I2C_ERR_NO_ACK) > + udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); > +
>Is a delay here good, would it be better to sleep so that some other process can gain cpu time? >>We mostly used 100 khz i2c clock frequency and delay in that case will be 20 usec. Would it be ok to sleep for such a smaller time? Won't it increase any other overhead?
Please let me know if sleep is better option here instead of waiting.
Thanks Alok
-- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
| |