Messages in this thread Patch in this message | | | From | Borislav Petkov <> | Subject | [PATCH 4/6] x86, RAS: Add function enabling direct writes to MCE MSRs | Date | Mon, 8 Oct 2012 19:11:31 +0200 |
| |
From: Borislav Petkov <borislav.petkov@amd.com>
Normally, writing to MCE MSRs causes a #GP. Add a function to enable direct accesses to those MSRs.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> --- arch/x86/ras/amd/mce-inject.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c index 66969eab5591..c0c811579ce9 100644 --- a/arch/x86/ras/amd/mce-inject.c +++ b/arch/x86/ras/amd/mce-inject.c @@ -55,6 +55,30 @@ DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n"); DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n"); /* + * Caller needs to be make sure this cpu doesn't disappear + * from under us, i.e.: get_cpu/put_cpu. + */ +static int toggle_hw_mce_inject(unsigned int cpu, bool enable) +{ + u32 l, h; + int err; + + err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h); + if (err) { + pr_err("%s: error reading HWCR\n", __func__); + return err; + } + + enable ? (l |= BIT(18)) : (l &= ~BIT(18)); + + err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h); + if (err) + pr_err("%s: error writing HWCR\n", __func__); + + return err; +} + +/* * This denotes into which bank we're injecting and triggers * the injection, at the same time. */ -- 1.8.0.rc0.18.gf84667d
| |