Messages in this thread | | | Date | Fri, 26 Oct 2012 13:05:54 +0200 | From | Roland Stigge <> | Subject | Re: [PATCH 2/2] ARM: mach-imx: CAN clock fix for i.MX53 |
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On 10/26/2012 12:30 PM, Marc Kleine-Budde wrote: >>>> + clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", >>>> "can_sel", MXC_CCM_CCGR4, 6); + clk[can1_ipg_gate] = >>>> imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR4, 8); + >>>> clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", >>>> "can_sel", MXC_CCM_CCGR4, 6); + clk[can2_ipg_gate] = >>>> imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 8); >>> >>> This doesn't. >> >> This may be right, but unfortunately, since the introduction of >> your can1 + can2 clocking change, the first block stopped working >> for me. > > You are effectively using can2's clock for can1. Are you sure you > haven't mixed up can1 and can2?
Just using the above patch and patch 1/2 from this series (missing can pinmuxing), doing like this in custom .dts:
+ can1: can@53fc8000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_1>; + clock-frequency = <66500000>; + status = "okay"; + };
Then, the can0 interface appears which can be upped as network interface.
Quite straightforward, isn't it?
Roland
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