Messages in this thread | | | Date | Tue, 31 Jan 2012 11:58:55 +0000 | From | Alan Cox <> | Subject | Re: [PATCH] NVMe: Fix compilation on architecturs without readq/writeq |
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> u64 val; > val = readl(addr); > val |= readl(addr+4) << 32; > > is well-defined and must read the low word first - both at the C level > *and* at the CPU level. Anything else would be a bug in the > architecture "readl()" implementation or the hardware.
That doesn't make the access atomic to hardware however as a true 64bit readq/writeq would be ?
It seems to me the two are not quite the same semantically
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