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SubjectRe: [PATCH 2/2] jump labels/x86: Use etiher 5 byte or 2 byte jumps
On 01/19/2012 06:41 AM, Mathieu Desnoyers wrote:
>> diff --git a/arch/x86/include/asm/jump_label.h b/arch/x86/include/asm/jump_label.h
>> index a32b18c..872b3e1 100644
>> --- a/arch/x86/include/asm/jump_label.h
>> +++ b/arch/x86/include/asm/jump_label.h
>> @@ -14,7 +14,7 @@
>> static __always_inline bool arch_static_branch(struct jump_label_key *key)
>> {
>> asm goto("1:"
>> - JUMP_LABEL_INITIAL_NOP
>> + "jmp %l[l_yes]\n"
>
> Is it possible that the compiler choose a jump that is not 2 or 5-byte ?
> e.g. a jmp rel16 (e9 opcode) on 32-bit x86, or any of the other
> instruction listed under the JMP-Jump instruction in the Intel insn
> manual ?
>

No.

>> void *(*poker)(void *, const void *, size_t))
>> {
>> union jump_code_union code;
>> + unsigned char nop;
>> + unsigned char op;
>> + unsigned size;
>> + void *ip = (void *)entry->code;
>> + void *ideal = (void *)ideal_nops[NOP_ATOMIC5];
>
> "void *" should possibly be "unsigned char *" here to respect the nop
> place-holder typing.
>

const unsigned char * please.

>> +
>> + /* Use probe_kernel_read()? */
>> + op = *(unsigned char *)ip;
>> + nop = ideal_nops[NOP_ATOMIC5][0];
>>
>> if (type == JUMP_LABEL_ENABLE) {
>> - code.jump = 0xe9;
>> - code.offset = entry->target -
>> - (entry->code + JUMP_LABEL_NOP_SIZE);
>> - } else
>> - memcpy(&code, ideal_nops[NOP_ATOMIC5], JUMP_LABEL_NOP_SIZE);
>> + if (op == 0xe9 || op == 0xeb)
>> + /* Already enabled. Warn? */
>
> This could be caused by failure to run the link-time script, or running
> the transform twice. A warning would indeed be welcome, as this should
> never happen.
>

Warning? No. ERROR. Something very bad could be happening here. We
have covered this before.

-hpa

--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.



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