Messages in this thread | | | From | Keith Packard <> | Subject | Re: [Intel-gfx] [PATCH 06/21] drm/i915: Unlock PCH_PP_CONTROL always | Date | Fri, 30 Sep 2011 16:14:40 -0700 |
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On Fri, 30 Sep 2011 19:09:46 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
> grep shows that we also write to PCH_PP_CONTROL in intel_lvds.c in the > dpms functions - any reasons these two writes are left out?
Upon a bit of review:
The bspec makes it clear that this write protect key only needs to be written for eDP on DPA -- it's a work-around for a bug where panel power sequencing wouldn't work right.
The LVDS code does disable write protect in the _init function, which seems global enough, but misses the resume case. We shouldn't ever need to set this field though; it write protects registers only when the panel is running. We could presumably remove the write protect disable entirely in the LVDS code.
So, I think the patch as written is correct.
-- keith.packard@intel.com [unhandled content-type:application/pgp-signature] | |