Messages in this thread | | | From | Andi Kleen <> | Subject | Re: [V3][PATCH 4/7] perf, x86: Implement IBS interrupt handler | Date | Thu, 22 Sep 2011 14:51:34 -0700 |
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Robert Richter <robert.richter@amd.com> writes: > > +static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs) > +{ > + struct perf_event *event = NULL; > + struct hw_perf_event *hwc = &event->hw; > + struct perf_sample_data data; > + struct perf_raw_record raw; > + struct pt_regs regs; > + struct perf_ibs_data ibs_data; > + int offset, size; > + unsigned int msr; > + u64 *buf; > + > + msr = hwc->config_base; > + buf = ibs_data.regs; > + rdmsrl(msr, *buf); > + if (!(*buf++ & perf_ibs->valid_mask)) > + return 0;
No check if the NMI is really caused by IBS? Very nasty. This will not interoperate well with other NMIs.
-Andi
-- ak@linux.intel.com -- Speaking for myself only
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