Messages in this thread | | | Date | Sat, 17 Sep 2011 19:37:59 -0400 | Subject | Re: TLB flush question (x86_64) | From | Brian Gerst <> |
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On Sat, Sep 17, 2011 at 3:12 PM, Andreas Mohr <andi@lisas.de> wrote: > Hi, > > decided to reply since there hasn't been any activity yet. > >> Is there any particular reason why >> the entire address space is flushed from the tlb while only a range of >> virtual address space was supposedly required to be flushed? > > While this particular function has actually changed in less medieval > kernel versions, it would be nice if someone knew an answer to that, > especially since TLB activity may have grave performance implications. >
x86 hardware can only flush single pages or the whole TLB. It would be possible to loop over a small set of pages and invalidate each one, but the threshold for where that becomes more efficient than flushing everything is difficult to determine.
-- Brian Gerst
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