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SubjectRe: [patch 03/36] Hexagon: Add bitops support
Date
Pavel Machek <pavel@ucw.cz> writes:

> Hi!
>
>> + __asm__ __volatile__ (
>> + " {R10 = %1; R11 = asr(%2,#5); }\n"
>> + " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
>> + "1: R12 = memw_locked(R10);\n"
>> + " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
>> + " memw_locked(R10,P1) = R12;\n"
>> + " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
>
> Nice assembly syntax, btw. I can only wish architectures such as arm
> used something as readable...

The Blackfin syntax looks similar. Now you may call me old-fashioned if
you want, but I personally find traditional assembler syntax much easier
to work with.

--
Måns Rullgård
mans@mansr.com

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