lkml.org 
[lkml]   [2011]   [Aug]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH] memcg: remove unneeded preempt_disable
From
Date


Christoph Lameter <cl@linux.com> wrote:

>On Thu, 25 Aug 2011, James Bottomley wrote:
>
>> >ARM seems to have these LDREX/STREX instructions for that purpose
>which
>> >seem to be used for generating atomic instructions without lockes. I
>> >guess
>> >other RISC architectures have similar means of doing it?
>>
>> Arm isn't really risc. Most don't. However even with ldrex/strex
>you need two instructions for rmw.
>
>Well then what is "really risc"? RISC is an old beaten down marketing
>term
>AFAICT and ARM claims it too.

Reduced Instruction Set Computer. This is why we're unlikely to have complex atomic instructions: the principle of risc is that you build them up from basic ones.

James
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity and top posting.


\
 
 \ /
  Last update: 2011-08-25 20:37    [from the cache]
©2003-2011 Jasper Spaans. Advertise on this site