Messages in this thread Patch in this message | | | Date | Mon, 01 Aug 2011 16:18:34 -0700 | From | Greg KH <> | Subject | [19/70] ARM: pxa910: correct nand pmu setting |
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2.6.39-stable review patch. If anyone has any objections, please let us know.
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From: Lei Wen <leiwen@marvell.com>
commit d204b2c5b16df935fa9a546c528e168859fddcc0 upstream.
The original pair of <0x01db, 208000000> is invalid. Correct to the valid value.
Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
--- arch/arm/mach-mmp/pxa910.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c @@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); -static APMU_CLK(nand, NAND, 0x01db, 208000000); +static APMU_CLK(nand, NAND, 0x19b, 156000000); static APMU_CLK(u2o, USB, 0x1b, 480000000); /* device and clock bindings */
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