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SubjectRe: [PATCH 1/4] perf: Add memory load/store events generic code
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On Wed, 2011-07-06 at 13:53 +0800, Lin Ming wrote:

> Do you mean to use the "impossible combinations" to express the inverse?

Nah, impossible would be things like having neither LOAD nor STORE set.

> MEM_STORE_DCU_MISS as: store-l2-l3-dram
> MEM_STORE_STLB_MISS as: store-itlb-dtlb
>
> How about below code?

Right, something like that. Robert can the IBS data source data be
mapped onto this as well?

> #define PERF_MEM_LOAD (1ULL << 0)
> #define PERF_MEM_STORE (1ULL << 1)
> #define PERF_MEM_ATOMIC (1ULL << 2)
> #define PERF_MEM_L1 (1ULL << 3)
> #define PERF_MEM_L2 (1ULL << 4)
> #define PERF_MEM_L3 (1ULL << 5)
> #define PERF_MEM_RAM (1ULL << 6)
> #define PERF_MEM_UNKNOWN (1ULL << 7)
> #define PERF_MEM_IO (1ULL << 8)
> #define PERF_MEM_UNCACHED (1ULL << 9)
> #define PERF_MEM_RESERVED (1ULL << 10)
> #define PERF_MEM_LOCAL (1ULL << 11)
> #define PERF_MEM_REMOTE (1ULL << 12)
> #define PERF_MEM_SNOOP (1ULL << 13)
> #define PERF_MEM_MODIFIED (1ULL << 14)
> #define PERF_MEM_EXCLUSIVE (1ULL << 15)
> #define PERF_MEM_SHARED (1ULL << 16)
> #define PERF_MEM_INVALID (1ULL << 17)

> #define PERF_MEM_ITLB (1ULL << 18)
> #define PERF_MEM_DTLB (1ULL << 19)
> #define PERF_MEM_STLB (1ULL << 20)

Are these TLB hit or miss?

> #define PERF_MEM_STORE_L1D_HIT \
> (PERF_MEM_STORE | PERF_MEM_L1)
>
> #define PERF_MEM_STORE_L1D_MISS \
> (PERF_MEM_STORE | PERF_MEM_L2 | PERF_MEM_L3 | PERF_MEM_RAM)
>
> #define PERF_MEM_STORE_STLB_HIT \
> (PERF_MEM_STORE | PERF_MEM_STLB)
>
> #define PERF_MEM_STORE_STLB_MISS \
> (PERF_MEM_STORE | PERF_MEM_ITLB | PERF_MEM_DTLB)

Going by the definition in table 30-22 neither of these seem correct, a
STLB_HIT was defined as DTLB|STLB whereas a STLB_MISS was missing both
(resulting in a full page-table walk I presume).

> #define PERF_MEM_STORE_ATOMIC \
> (PERF_MEM_STORE | PERF_MEM_ATOMIC)
>
> #define PERF_MEM_LOAD_STLB_HIT \
> (PERF_MEM_LOAD | PERF_MEM_STLB)
>
> #define PERF_MEM_LOAD_STLB_MISS \
> (PERF_MEM_LOAD | PERF_MEM_ITLB | PERF_MEM_DTLB)

idem

> #define PERF_MEM_LOAD_ATOMIC \
> (PERF_MEM_LOAD | PERF_MEM_ATOMIC)
>



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