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    SubjectRe: [PATCH v2 21/22] KVM: MMU: mmio page fault support
    On 06/29/2011 05:22 PM, Avi Kivity wrote:
    > On 06/22/2011 05:36 PM, Xiao Guangrong wrote:
    >> The idea is from Avi:
    >>
    >> | We could cache the result of a miss in an spte by using a reserved bit, and
    >> | checking the page fault error code (or seeing if we get an ept violation or
    >> | ept misconfiguration), so if we get repeated mmio on a page, we don't need to
    >> | search the slot list/tree.
    >> | (https://lkml.org/lkml/2011/2/22/221)
    >>
    >> When the page fault is caused by mmio, we cache the info in the shadow page
    >> table, and also set the reserved bits in the shadow page table, so if the mmio
    >> is caused again, we can quickly identify it and emulate it directly
    >>
    >> Searching mmio gfn in memslots is heavy since we need to walk all memeslots, it
    >> can be reduced by this feature, and also avoid walking guest page table for
    >> soft mmu.
    >>
    >> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
    >> index 1319050..e69a47a 100644
    >> --- a/arch/x86/kvm/mmu.c
    >> +++ b/arch/x86/kvm/mmu.c
    >> @@ -197,6 +197,41 @@ static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
    >> static u64 __read_mostly shadow_user_mask;
    >> static u64 __read_mostly shadow_accessed_mask;
    >> static u64 __read_mostly shadow_dirty_mask;
    >> +static u64 __read_mostly shadow_mmio_mask = (0xffull<< 49 | 1ULL);
    >
    > One bit is shifted out. And it will fail with 52-bit MAXPHYADDR.
    >
    > Please in addition, set the xwr bits to an invalid pattern on EPT (there is an MSR which specifies which patterns are valid; for example execute-only or write-only are invalid). If all patterns are valid AND MAXPHYADDR == 52, then just set the mask to 0 and it the optimization will be disabled.
    >

    OK, will fix, thanks!


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