Messages in this thread |  | | | Date | Mon, 23 May 2011 12:58:20 +0200 | | Subject | Re: [PATCH 0/3] perf_events: update extra shared registers management (v2) | | From | Stephane Eranian <> |
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On Mon, May 23, 2011 at 11:36 AM, Stephane Eranian <eranian@google.com> wrote: > On Mon, May 23, 2011 at 11:32 AM, Peter Zijlstra <peterz@infradead.org> wrote: >> On Mon, 2011-05-23 at 11:11 +0200, Peter Zijlstra wrote: >>> + if (event->hw.extra_reg.idx == EXTRA_REG_RSP_0) { >>> + event->attr.config = 0x01bb; >>> + event->hw.extra_reg.idx = EXTRA_REG_RSP_1; >>> + event->hw.extra_reg.msr = MSR_OFFCORE_RSP_1; >>> + } else if (event->hw.extra_reg.idx == EXTRA_REG_RSP_1) { >>> + event->attr.config = 0x01b7; >>> + event->hw.extra_reg.idx = EXTRA_REG_RSP_0; >>> + event->hw.extra_reg.msr = MSR_OFFCORE_RSP_0; >>> + } >> >> clearly I meant to write: >> >> event->hw.config &= ~X86_RAW_EVENT_MASK;
Not quite, you want INTEL_ARCH_EVENT_MASK instead because you only want to modify umask+event code.
There is a major issue as it stands, though. You can get into an infinite loop bouncing between RSP_0 and RSP_1 in case there is no solution in the group, i.e., you have 3 values for the extra MSR. I think you need to count the number of times you've called intel_try_alt_er() with success or maintain some sort of bitmask of possible alternate choices and when you exhaust that, you simply fail. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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