Messages in this thread |  | | | Date | Wed, 27 Apr 2011 07:47:02 -0700 | | Subject | Re: [PATCH] perf events: Add stalled cycles generic event - PERF_COUNT_HW_STALLED_CYCLES | | From | Arun Sharma <> |
| |
On Wed, Apr 27, 2011 at 4:11 AM, Ingo Molnar <mingo@elte.hu> wrote: > As for the first, 'overview' step, i'd like to use one or two numbers only, to > give people a general ballpark figure about how good the CPU is performing for > a given workload. > > Wouldnt UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 be in general a pretty good, > primary "stall" indicator? This is similar to the "cycles-uops_executed" value > in your script (UOPS_EXECUTED:PORT015:t=1 and UOPS_EXECUTED:PORT234_CORE > based): it counts cycles when there's no execution at all - not even > speculative one.
If we're going to pick one stall indicator, why not pick cycles where no uops are retiring?
cycles_no_uops_retired = cycles - c["UOPS_RETIRED:ANY:c=1:t=1"]
In the presence of C-states and some halted cycles, I found that I couldn't measure it via UOPS_RETIRED:ANY:c=1:i=1 because it counts halted cycles too and could be greater than (unhalted) cycles.
The other issue I had to deal with was UOPS_RETIRED > UOPS_EXECUTED condition. I believe this is caused by what AMD calls sideband stack optimizer and Intel calls dedicated stack manager (i.e. UOPS executed outside the main pipeline). A recursive fibonacci(30) is a good test case for reproducing this. > > Is this the direction you'd like to see perf stat to move into? Any comments, > suggestions? >
Looks like a step in the right direction. Thanks.
-Arun
|  |