Messages in this thread | | | Date | Fri, 22 Apr 2011 17:00:10 -0700 | From | Andi Kleen <> | Subject | Re: [PATCH 1/1] perf tools: Add missing user space support for config1/config2 |
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On Sat, Apr 23, 2011 at 12:57:42AM +0200, Peter Zijlstra wrote: > On Fri, 2011-04-22 at 23:54 +0200, Peter Zijlstra wrote: > > On Fri, 2011-04-22 at 23:37 +0200, Peter Zijlstra wrote: > > > The below needs filling out for !x86 (which I filled out with > > > unsupported events) and x86 needs the offcore bits fixed to auto select > > > between the two offcore events. > > > > Urgh, so SNB has different MSR_OFFCORE_RESPONSE bits and needs another table. > > Also, NHM offcore bits were wrong... it implemented _ACCESS as _HIT and
What is ACCESS if not a HIT?
> counted OTHER_CORE_HIT* as MISS even though its clearly documented as an > L3 hit.
When the other core owns the cache line it has to be fetched from there. That's not a LLC hit.
-Andi
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