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SubjectRe: [PATCH 1/1] perf tools: Add missing user space support for config1/config2
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On Fri, 2011-04-22 at 23:54 +0200, Peter Zijlstra wrote:
> On Fri, 2011-04-22 at 23:37 +0200, Peter Zijlstra wrote:
> > The below needs filling out for !x86 (which I filled out with
> > unsupported events) and x86 needs the offcore bits fixed to auto select
> > between the two offcore events.
>
> Urgh, so SNB has different MSR_OFFCORE_RESPONSE bits and needs another table.

/*
* Sandy Bridge MSR_OFFCORE_RESPONSE bits;
* See IA32 SDM Vol 3B 30.8.5
*/

#define SNB_DMND_DATA_RD (1 << 0)
#define SNB_DMND_RFO (1 << 1)
#define SNB_DMND_IFETCH (1 << 2)
#define SNB_DMND_WB (1 << 3)
#define SNB_PF_DATA_RD (1 << 4)
#define SNB_PF_DATA_RFO (1 << 5)
#define SNB_PF_IFETCH (1 << 6)
#define SNB_PF_LLC_DATA_RD (1 << 7)
#define SNB_PF_LLC_RFO (1 << 8)
#define SNB_PF_LLC_IFETCH (1 << 9)
#define SNB_BUS_LOCKS (1 << 10)
#define SNB_STRM_ST (1 << 11)
/* hole */
#define SNB_OFFCORE_OTHER (1 << 15)
#define SNB_COMMON (1 << 16)
#define SNB_NO_SUPP (1 << 17)
#define SNB_LLC_HITM (1 << 18)
#define SNB_LLC_HITE (1 << 19)
#define SNB_LLC_HITS (1 << 20)
#define SNB_LLC_HITF (1 << 21)
/* hole */
#define SNB_SNP_NONE (1 << 31)
#define SNB_SNP_NOT_NEEDED (1 << 32)
#define SNB_SNP_MISS (1 << 33)
#define SNB_SNP_NO_FWD (1 << 34)
#define SNB_SNP_FWD (1 << 35)
#define SNB_HITM (1 << 36)
#define SNB_NON_DRAM (1 << 37)

#define SNB_DMND_READ (SNB_DMND_DATA_RD)
#define SNB_DMND_WRITE (SNB_DMND_RFO|SNB_DMND_WB|SNB_STRM_ST)
#define SNB_DMND_PREFETCH (SNB_PF_DATA_RD|SNB_PF_DATA_RFO)

Is what I came up with, but I'm stumped on how to construct:

#define SNB_L3_HIT
#define SNB_L3_MISS

#define SNB_ALL_DRAM
#define SNB_REMOTE_DRAM

Anybody got clue?




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