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    SubjectRe: perf_events: questions about cpu_has_ht_siblings() and offcore support
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    On Fri, 2011-04-22 at 23:05 +0800, Stephane Eranian wrote:
    > On Fri, Apr 22, 2011 at 5:03 PM, Lin Ming <ming.m.lin@intel.com> wrote:
    > > On Fri, 2011-04-22 at 22:41 +0800, Stephane Eranian wrote:
    > >> On Fri, Apr 22, 2011 at 4:31 PM, Lin Ming <ming.m.lin@intel.com> wrote:
    > >> > On Fri, 2011-04-22 at 21:46 +0800, Stephane Eranian wrote:
    > >> >> On Fri, Apr 22, 2011 at 3:26 PM, Lin Ming <ming.m.lin@intel.com> wrote:
    > >> >> > On Fri, 2011-04-22 at 20:59 +0800, Stephane Eranian wrote:
    > >> >> >> Lin,
    > >> >> >>
    > >> >> >> In arch/x86/include/asm/smp.h, you added:
    > >> >> >>
    > >> >> >> static inline bool cpu_has_ht_siblings(void)
    > >> >> >> {
    > >> >> >> bool has_siblings = false;
    > >> >> >> #ifdef CONFIG_SMP
    > >> >> >> has_siblings = cpu_has_ht && smp_num_siblings > 1;
    > >> >> >> #endif
    > >> >> >> return has_siblings;
    > >> >> >> }
    > >> >> >>
    > >> >> >> I am wondering about the goal of this function.
    > >> >> >>
    > >> >> >> Is it supposed to return whether or not HT is enabled?
    > >> >> >>
    > >> >> >> Ht enabled != HT supported
    > >> >> >
    > >> >> > It's used to check if HT is supported.
    > >> >> >
    > >> >> Ok, that makes more sense.
    > >> >>
    > >> >> > But unfortunately, we didn't find a way to check if HT is enabled.
    > >> >> > So I just check if HT is supported.
    > >> >> >
    > >> >> >>
    > >> >> >> +static inline int is_ht_enabled(void)
    > >> >> >> +{
    > >> >> >> + bool has_ht = false;
    > >> >> >> +#ifdef CONFIG_SMP
    > >> >> >> + int w;
    > >> >> >> + w = cpumask_weight(cpu_sibling_mask(smp_processor_id()));
    > >> >> >> + has_ht = cpu_has_ht && w > 1;
    > >> >> >> +#endif
    > >> >> >> + return has_ht;
    > >> >> >> +}
    > >> >> >>
    > >> >> >> OTOH, you need some validation even in the case HT is off. No two events
    > >> >> >> scheduled together on the same PMU can have different values for the extra
    > >> >
    > >> > I got it now.
    > >> >
    > >> >> >> reg. Thus, the fact that cpu_has_ht_siblings() is imune to HT state helps here,
    > >> >> >> but then what's the point of it?
    > >> >> >
    > >> >> > The points is to avoid the percore resource allocations(which are used
    > >> >> > to sync between HTs) if HT is not supported.
    > >> >> >
    > >> >> But if you check x86_pmu.extra_regs, that should do it as well.
    > >> >
    > >> > I don't understand here.
    > >> > Did you mean we can avoid the percore resource allocations by just
    > >> > checking x86_pmu.extra_regs? How?
    > >>
    > >> Is you have not extra_regs, i.e., regs that are shared, then why would
    > >> you need the percore allocation?
    > >
    > > But "extra_regs" does not imply they are regs that are shared.
    > > It only means some events need to set extra registers to work.
    > >
    > Do you have example of such register that would not require the
    > extra mutual exclusion either between HT threads or between
    > events on the same PMU?

    No.

    I was thinking the case that "extra_regs" may be per-thread, instead of
    pef-core.

    So if there are "extra_regs" or not does not connected directly with if
    locking is needed or not.



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