[lkml]   [2011]   [Apr]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [PATCH] OMAP: iommu flush page table entries from L1 and L2 cache
    On Fri, Apr 15, 2011 at 11:24:16AM +0900, KyongHo Cho wrote:
    > That means we need to translate logical to physical address and it is
    > sometimes not trivial.

    What do you mean "sometimes not trivial" ? The DMA does nothing more
    than virt_to_phys(virt) to get the physical address. It's _that_ simple.

    If virt_to_phys(virt) is likely to fail, there's protection in the DMA API
    to BUG_ON() in that case.

    > Finally, the kernel will contain many similar routines that do same thing.

    So when we get coherent DMA, you won't care that the DMA API functions
    start doing nothing with caches?

     \ /
      Last update: 2011-04-15 10:15    [W:0.018 / U:53.288 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site