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    SubjectRe: [PATCH] OMAP: iommu flush page table entries from L1 and L2 cache
    On Fri, Apr 15, 2011 at 11:24:16AM +0900, KyongHo Cho wrote:
    > That means we need to translate logical to physical address and it is
    > sometimes not trivial.

    What do you mean "sometimes not trivial" ? The DMA does nothing more
    than virt_to_phys(virt) to get the physical address. It's _that_ simple.

    If virt_to_phys(virt) is likely to fail, there's protection in the DMA API
    to BUG_ON() in that case.

    > Finally, the kernel will contain many similar routines that do same thing.

    So when we get coherent DMA, you won't care that the DMA API functions
    start doing nothing with caches?


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