Messages in this thread |  | | | Date | Fri, 25 Mar 2011 00:14:24 -0700 | | From | Burt Triplett <> | | Subject | Re: x86/microcode: intel: correctly handle negative revisions |
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On 3/24/2011 7:09 PM, Henrique de Moraes Holschuh wrote: > As per the Intel SDM vol 3A, microcode revisions are signed 32-bit > numbers. The code was handling them as unsigned int in some places and as > an int in other places. > > As per the clarification posted by Burt Triplett from the Intel BITS > project, negative microcode revisions are used internally at Intel and > should always get loaded. Also, they should not be overriden unless we > can somehow differentiate "automated" loading from "forced" loading (which > we cannot at this time). Burt says the SDM will be updated with this > information eventually. > > The code should: > > 1. Ignore attempts to load a zero-revision microcode (that value is > reserved for the CPU to signal that it is running with the factory > microcode, and must not be present in a normal microcode update); > > 2. Always load negative revision microcodes, to help Intel's engineers; > > 3. Avoid upgrading from a BIOS-loaded negative revision microcode to > a normal microcode, to not get in the way of Intel's engineers. > > 4. Upgrade from revision 0 (no updates loaded in CPU) to any revision. > > It was already doing some of that, but I don't feel like trying to track > down exactly how the old code with its mix of signed/unsigned handling of > revisions would behave in each of the above cases. > > Signed-off-by: Henrique de Moraes Holschuh <hmh@hmh.eng.br> > LKML-Reference: <4D87E2CD.6020306@pbjtriplett.org> > Cc: Tigran Aivazian <tigran@aivazian.fsnet.co.uk> > Cc: "H. Peter Anvin" <hpa@zytor.com> > Cc: Burt Triplett <burt@pbjtriplett.org>
Reviewed-by: Burt Triplett <burt@pbjtriplett.org>
Thanks, Burt Triplett
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