Messages in this thread | | | Date | Thu, 24 Mar 2011 17:33:32 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCH -tip] perf, x86: P4 PMU - Add missing read of a counter before test |
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* Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> On 03/24/2011 11:48 AM, Ingo Molnar wrote: > > > > * Cyrill Gorcunov <gorcunov@gmail.com> wrote: > > > >> Don, I've added yours SOB, ok? (The patch is attached to avoid > >> space/tabs problem > >> due to web-mail client) > > > > The patch lacks a proper description about the motivation and effects of the > > patch. > > > > Thanks, > > > > Ingo > > Ingo, does this one looks better? > > --- > From: Don Zickus <dzickus@redhat.com> > Subject: [PATCH -tip] perf, x86: P4 PMU - Add missing read of MSR register to catch unflagged overflows > > The read of a proper MSR register was missed so instead of a counter the > configration register is tested (it has ARCH_P4_UNFLAGGED_BIT always cleared) > and unflagged overflows never have been catched. Fix it by reading a proper > MSR register.
So what effect does this have on the regular perf user? Please try to describe the real-life effect of the bug/problem fixed here.
Thanks,
Ingo
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