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    Subject[62/78] perf, powerpc: Handle events that raise an exception without overflowing
    2.6.38-stable review patch.  If anyone has any objections, please let us know.

    ------------------

    From: Anton Blanchard <anton@samba.org>

    commit 0837e3242c73566fc1c0196b4ec61779c25ffc93 upstream.

    Events on POWER7 can roll back if a speculative event doesn't
    eventually complete. Unfortunately in some rare cases they will
    raise a performance monitor exception. We need to catch this to
    ensure we reset the PMC. In all cases the PMC will be 256 or less
    cycles from overflow.

    Signed-off-by: Anton Blanchard <anton@samba.org>
    Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
    LKML-Reference: <20110309143842.6c22845e@kryten>
    Signed-off-by: Ingo Molnar <mingo@elte.hu>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/powerpc/include/asm/reg.h | 1 +
    arch/powerpc/kernel/perf_event.c | 24 +++++++++++++++++++++++-
    2 files changed, 24 insertions(+), 1 deletion(-)

    --- a/arch/powerpc/include/asm/reg.h
    +++ b/arch/powerpc/include/asm/reg.h
    @@ -880,6 +880,7 @@
    #define PV_970 0x0039
    #define PV_POWER5 0x003A
    #define PV_POWER5p 0x003B
    +#define PV_POWER7 0x003F
    #define PV_970FX 0x003C
    #define PV_630 0x0040
    #define PV_630p 0x0041
    --- a/arch/powerpc/kernel/perf_event.c
    +++ b/arch/powerpc/kernel/perf_event.c
    @@ -1269,6 +1269,28 @@ unsigned long perf_instruction_pointer(s
    return ip;
    }

    +static bool pmc_overflow(unsigned long val)
    +{
    + if ((int)val < 0)
    + return true;
    +
    + /*
    + * Events on POWER7 can roll back if a speculative event doesn't
    + * eventually complete. Unfortunately in some rare cases they will
    + * raise a performance monitor exception. We need to catch this to
    + * ensure we reset the PMC. In all cases the PMC will be 256 or less
    + * cycles from overflow.
    + *
    + * We only do this if the first pass fails to find any overflowing
    + * PMCs because a user might set a period of less than 256 and we
    + * don't want to mistakenly reset them.
    + */
    + if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256))
    + return true;
    +
    + return false;
    +}
    +
    /*
    * Performance monitor interrupt stuff
    */
    @@ -1316,7 +1338,7 @@ static void perf_event_interrupt(struct
    if (is_limited_pmc(i + 1))
    continue;
    val = read_pmc(i + 1);
    - if ((int)val < 0)
    + if (pmc_overflow(val))
    write_pmc(i + 1, 0);
    }
    }



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