Messages in this thread | | | Subject | Re: [PATCH]x86: flush tlb if PGD entry is changed in i386 PAE mode | From | Shaohua Li <> | Date | Fri, 18 Mar 2011 10:19:08 +0800 |
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On Wed, 2011-03-16 at 21:03 +0800, Rik van Riel wrote: > On 03/15/2011 11:37 PM, Shaohua Li wrote: > > According to intel CPU manual, every time PGD entry is changed in i386 PAE mode, > > we need do a full TLB flush. Current code follows this and there is comment > > for this too in the code. But current code misses the multi-threaded case. A > > changed page table might be used by several CPUs, every such CPU should flush > > TLB. > > Usually this isn't a problem, because we prepopulate all PGD entries at process > > fork. But when the process does munmap and follows new mmap, this issue will be > > triggered. When it happens, some CPUs will keep doing page fault. > > > > See: http://marc.info/?l=linux-kernel&m=129915020508238&w=2 > > > > Reported-by: Yasunori Goto<y-goto@jp.fujitsu.com> > > Signed-off-by: Shaohua Li<shaohua.li@intel.com> > > Tested-by: Yasunori Goto<y-goto@jp.fujitsu.com> > > Reviewed-by: Rik van Riel <riel@redhat.com> Ingo & akpm, can you pick this one?
Thanks, Shaohua
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