Messages in this thread | | | Date | Thu, 10 Mar 2011 13:20:00 -0500 | From | Jason Baron <> | Subject | Re: [PATCH 0/2] jump label: update for .39 |
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On Thu, Mar 10, 2011 at 01:04:01PM -0500, Steven Rostedt wrote: > On Thu, 2011-03-10 at 09:27 -0800, David Daney wrote: > > On 03/10/2011 07:38 AM, Steven Rostedt wrote: > > > >> Can you explain what would prevent gcc from aligning these 3 pointers > > >> (total of 24 bytes on 64-bit architectures) on 32-bytes ? > > > > I can: > > > > http://www.x86-64.org/documentation/abi.pdf Section 3.1.2: > > > > Aggregates and Unions > > Note, we are not dealing with C or arrays, but with inline assembly, and > the linker. > > +static __always_inline bool arch_static_branch(struct jump_label_key *key) > +{ > + asm goto("1:\tnop\n\t" > + "nop\n\t" > + ".pushsection __jump_table, \"aw\"\n\t" > + WORD_INSN " 1b, %l[l_yes], %0\n\t" > + ".popsection\n\t" > + : : "i" (key) : : l_yes); > + return false; > +l_yes: > + return true; > +} > > > That push/pop section part creates the structure we are talking about. > It's made up of three pointers. The address of the nop, the address of > the label l_yes and the address of the key. > > Now its up to the linker to decide where to place that element. Can we > guarantee that it will always be on an 8 byte boundery? > Hmm, I wonder if we could add a .ALIGN sizeof(long) before that? >
we can. Sparc does it, see: arch/sparc/include/asm/jump_label.h.
So I guess it would be .align 8 for 64-bit and .align 4 for 32-bit...
-Jason
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