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    SubjectRe: [PATCH 1/4] msm: scm: Mark inline asm as volatile
    On 02/25/2011 03:56 AM, Will Deacon wrote:
    > Hi Stephen,
    >
    > On Thu, 2011-02-24 at 18:44 +0000, Stephen Boyd wrote:
    >> We don't want the compiler to remove these asm statements or
    >> reorder them in any way. Mark them as volatile to be sure.
    >>
    >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
    >> ---
    >> arch/arm/mach-msm/scm.c | 4 ++--
    >> 1 files changed, 2 insertions(+), 2 deletions(-)
    >>
    >> diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
    >> index f4b9bc9..ba57b5a 100644
    >> --- a/arch/arm/mach-msm/scm.c
    >> +++ b/arch/arm/mach-msm/scm.c
    >> @@ -174,7 +174,7 @@ static u32 smc(u32 cmd_addr)
    >> register u32 r0 asm("r0") = 1;
    >> register u32 r1 asm("r1") = (u32)&context_id;
    >> register u32 r2 asm("r2") = cmd_addr;
    >> - asm(
    >> + asm volatile(
    >> __asmeq("%0", "r0")
    >> __asmeq("%1", "r0")
    >> __asmeq("%2", "r1")
    >> @@ -271,7 +271,7 @@ u32 scm_get_version(void)
    >> return version;
    >>
    >> mutex_lock(&scm_lock);
    >> - asm(
    >> + asm volatile(
    >> __asmeq("%0", "r1")
    >> __asmeq("%1", "r0")
    >> __asmeq("%2", "r1")
    >
    >
    > These asm blocks all have sensible looking output constraints. Why
    > do they need to be marked volatile?

    I'm not seeing any different code with or without this so I saw little
    harm in marking them as volatile. I really don't want the compiler
    moving them or deleting them so it seemed safer to just mark it volatile
    to make sure nothing happens to the smc instructions.

    --
    Sent by an employee of the Qualcomm Innovation Center, Inc.
    The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.



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