Messages in this thread | | | Subject | Re: [patch] x86, mm: avoid stale tlb entries by clearing prev mm_cpumask after switching mm | From | Suresh Siddha <> | Date | Wed, 02 Feb 2011 17:55:51 -0800 |
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On Wed, 2011-02-02 at 17:23 -0800, Andi Kleen wrote: > Suresh Siddha <suresh.b.siddha@intel.com> writes: > > > For the prev mm that is handing over the cpu to another mm, clear the cpu > > from the mm_cpumask(prev) after the cr3 is changed. > > > > Otherwise, clearing the mm_cpumask early will avoid the flush tlb IPI's while > > the cr3 and TLB's are still pointing to the prev mm. And this window can lead > > to the stale (global) TLB entries. > > > > Marking it for -stable, though we haven't seen any reported failure that > > can be attributed to this. > > Would it be safer to add a memory barrier between the load_cr3 and the > cpumask_clear_cpu()? As far as I can see cpumask_clear_cpu doesn't > imply a general one and load_cr3 doesn't either. There's this > __force_order hack in system.h, but I don't think it will enforce > order here.
I thought "asm volatile" is going to take care of that.
If not, then we have issues even today. no?
thanks, suresh
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