lkml.org 
[lkml]   [2011]   [Feb]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    SubjectRe: [PATCH 0/2] jump label: 2.6.38 updates
    From
    On Mon, Feb 14, 2011 at 11:09 PM, Paul E. McKenney
    <paulmck@linux.vnet.ibm.com> wrote:

    Hi Paul,

    > What CPU family are we talking about here?  For cache coherent CPUs,
    > cache coherence really is supposed to work, even for mixed atomic and
    > non-atomic instructions to the same variable.

    Is there a specific situation you can think of where this would be a
    problem? I have to admit to a certain amount of unease with the design
    our hardware guys came up with, but I don't have a specific case where
    it won't work, just cases where it is less than optimal.
    --
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2011-02-15 12:55    [W:0.024 / U:0.796 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site