Messages in this thread |  | | | Date | Mon, 14 Feb 2011 15:09:02 -0800 | | From | "Paul E. McKenney" <> | | Subject | Re: [PATCH 0/2] jump label: 2.6.38 updates |
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On Mon, Feb 14, 2011 at 06:03:01PM -0500, Mathieu Desnoyers wrote: > * Matt Fleming (matt@console-pimps.org) wrote: > > On Mon, 14 Feb 2011 13:46:00 -0800 (PST) > > David Miller <davem@davemloft.net> wrote: > > > > > From: Steven Rostedt <rostedt@goodmis.org> > > > Date: Mon, 14 Feb 2011 16:39:36 -0500 > > > > > > > Thus it is not about global, as global is updated by normal means > > > > and will update the caches. atomic_t is updated via the ll/sc that > > > > ignores the cache and causes all this to break down. IOW... broken > > > > hardware ;) > > > > > > I don't see how cache coherency can possibly work if the hardware > > > behaves this way. > > > > Cache coherency is still maintained provided writes/reads both go > > through the cache ;-) > > > > The problem is that for read-modify-write operations the arbitration > > logic that decides who "wins" and is allowed to actually perform the > > write, assuming two or more CPUs are competing for a single memory > > address, is not implemented in the cache controller, I think. I'm not a > > hardware engineer and I never understood how the arbitration logic > > worked but I'm guessing that's the reason that the ll/sc instructions > > bypass the cache. > > > > Which is why the atomic_t functions worked out really well for that > > arch, such that any accesses to an atomic_t * had to go through the > > wrapper functions.
???
What CPU family are we talking about here? For cache coherent CPUs, cache coherence really is supposed to work, even for mixed atomic and non-atomic instructions to the same variable.
Thanx, Paul
> If this is true, then we have bugs in lots of xchg/cmpxchg users (which > do not reside in atomic.h), e.g.: > > fs/fs_struct.c: > int current_umask(void) > { > return current->fs->umask; > } > EXPORT_SYMBOL(current_umask); > > kernel/sys.c: > SYSCALL_DEFINE1(umask, int, mask) > { > mask = xchg(¤t->fs->umask, mask & S_IRWXUGO); > return mask; > } > > The solution to this would be to force all xchg/cmpxchg users to swap to > atomic.h variables, which would force the ll semantic on read. But I'd > really like to see where this is documented first -- or which PowerPC > engineer we should talk to. > > Thanks, > > Mathieu > > -- > Mathieu Desnoyers > Operating System Efficiency R&D Consultant > EfficiOS Inc. > http://www.efficios.com
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