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SubjectRe: [PATCH] MIPS: Add RTC support for loongson1B
On Thu, Dec 01, 2011 at 04:44:38PM +0800, zhzhl555@gmail.com wrote:

> + writel(t, SYS_TOYWRITE1);
> + __asm__ volatile ("sync");
> + c = 0x10000;
> + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c)
> + usleep_range(1000, 3000);

Why the SYNC instruction? This is an uncached write and on all MIPS CPUs
the SYNC instruction will only make sure the write has left the CPU's
write buffers. There is no guarantee that by the time the SYNC has completed
the write has actually reached its destination. If that is what you want,
read something from device. Reads will only complete after all preceeding
writes have completed.

In this driver all instances of SYNC instructions are followed by polling
loops reading from the RTC which means all SYNCs should be unnecessary.

Or?

Ralf


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