lkml.org 
[lkml]   [2011]   [Dec]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRE: [PATCH] i2c: tegra: Add delay before reset the controller
> -----Original Message-----
> From: Alok Chauhan
>
> Hi,
>
> (Adding Laxman Dewangan)
>
> >This change causes problems systems with some models of i2c TPMs, since the
> first transaction to them will always time out (TPM quirk), and the delay
> means that the tpm will have time to go back to sleep and thus timeout >even
> on the retry. So you'll never make progress.
> Working on this.
>
> -Alok
>
>
> -----Original Message-----
> From: Olof Johansson [mailto:olof@lixom.net]
> Sent: Friday, December 23, 2011 2:48 AM
> To: Alok Chauhan
> Cc: khali@linux-fr.org; ben-linux@fluff.org; Stephen Warren;
> bones@secretlab.ca; paul.gortmaker@windriver.com; linux-i2c@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-tegra@vger.kernel.org; dgreid@google.com
> Subject: Re: [PATCH] i2c: tegra: Add delay before reset the controller
>
> Hi,
>
> (Adding linux-tegra and Dylan Reid who was debugging this before)
>
> On Thu, Dec 22, 2011 at 2:41 AM, Alok Chauhan <alokc@nvidia.com> wrote:
> > From: Alok Chauhan <alokc@nvidia.com>
> >
> > In NACK error condition, I2C controller violates clock-to-data setup
> > time before stop. In Software, because of this reset of controller is
> > happening before I2C controller could complete STOP condition.
> >
> > Added worst case delay of 1 ms (assuming lowest clock frequency will
> > be 1 KHZ) before reset the controller in case of NACK error.
>
> This change causes problems systems with some models of i2c TPMs, since the
> first transaction to them will always time out (TPM quirk), and the delay
> means that the tpm will have time to go back to sleep and thus timeout even on
> the retry. So you'll never make progress.
>
> In other words: this patch will break some systems and thus shouldn't be
> applied.
>
I think the delay should be calculated based on speed. So if it is 100KHz, then
delay is 10mcro second for 1 bit. We should wait for 2 bit (ack clock to be complete and
stop pulse to be transmitted).
This patch will make sure that i2c driver will not break the specs i.e. in case of NACK error, the stop
signal should be completed by i2c controller before resetting controller.
I will prefer of having the udelay(2*1000000/speed).
>
> -Olof


\
 
 \ /
  Last update: 2011-12-23 12:23    [from the cache]
©2003-2014 Jasper Spaans. Advertise on this site