lkml.org 
[lkml]   [2011]   [Dec]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: bug report: irq 19: nobody cared (try booting with the "irqpoll" option)
Julian Sikorski wrote:
> W dniu 15.12.2011 18:49, Clemens Ladisch pisze:
>> Was it the JMB38x that used a wrong interface number in its PCIe
>> transactions, which would make the I/O-MMU map it to the wrong device?
>> [...]
>> add the kernel parameter intel_iommu=off to the boot loader.
>
> This did not work

> 00:1c.1 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 2
> Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
> 00:1c.3 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 4
> Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
> ...
> 03:00.0 Ethernet controller: JMicron Technology Corp. JMC250 PCI Express Gigabit Ethernet Controller (rev 05)
> 03:00.1 System peripheral: JMicron Technology Corp. SD/MMC Host Controller (rev 90)
> 03:00.2 SD Host controller: JMicron Technology Corp. Standard SD Host Controller (rev 90) (prog-if 01)
> 03:00.3 System peripheral: JMicron Technology Corp. MS Host Controller (rev 90)
> 05:00.0 FireWire (IEEE 1394): JMicron Technology Corp. IEEE 1394 Host Controller (prog-if 10 [OHCI])

Sorry, I didn't notice before that your FireWire controller is
a physically separate chip on another PCIe port, so whatever is
happening is unlikely to be related with another device.

It appears that the JMB381 is not correctly reinitialized when doing
a suspend/resume. However, the driver already does a reset of the chip,
so it isn't clear what else could be done. This might be a problem
with the PCI initialization as done by the BIOS; try a BIOS update, if
possible.


Regards,
Clemens


\
 
 \ /
  Last update: 2011-12-16 09:39    [W:0.065 / U:0.248 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site