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    SubjectRe: [Intel-gfx] [PATCH 3/7] drm/i915: Treat PCH eDP like DP in most places
    Date
    On Wed, 02 Nov 2011 11:29:53 -0400, Adam Jackson <ajax@redhat.com> wrote:

    > Redundant. You've already done the link_configuration |= above in the
    > common code. You can drop the second if chunk altogether.

    Here's the new version of that chunk of patch:

    @@ -850,32 +864,45 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
    intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
    intel_write_eld(encoder, adjusted_mode);
    }
    -
    memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
    intel_dp->link_configuration[0] = intel_dp->link_bw;
    intel_dp->link_configuration[1] = intel_dp->lane_count;
    intel_dp->link_configuration[8] = DP_SET_ANSI_8B10B;
    -
    /*
    * Check for DPCD version > 1.1 and enhanced framing support
    */
    if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
    (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) {
    intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
    - intel_dp->DP |= DP_ENHANCED_FRAMING;
    }

    - /* CPT DP's pipe select is decided in TRANS_DP_CTL */
    - if (intel_crtc->pipe == 1 && !HAS_PCH_CPT(dev))
    - intel_dp->DP |= DP_PIPEB_SELECT;
    + /* Split out the IBX/CPU vs CPT settings */

    - if (is_cpu_edp(intel_dp)) {
    - /* don't miss out required setting for eDP */
    - intel_dp->DP |= DP_PLL_ENABLE;
    - if (adjusted_mode->clock < 200000)
    - intel_dp->DP |= DP_PLL_FREQ_160MHZ;
    - else
    - intel_dp->DP |= DP_PLL_FREQ_270MHZ;
    + if (!HAS_PCH_CPT(dev) || is_cpu_edp(intel_dp)) {
    + intel_dp->DP |= intel_dp->color_range;
    +
    + if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
    + intel_dp->DP |= DP_SYNC_HS_HIGH;
    + if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
    + intel_dp->DP |= DP_SYNC_VS_HIGH;
    + intel_dp->DP |= DP_LINK_TRAIN_OFF;
    +
    + if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
    + intel_dp->DP |= DP_ENHANCED_FRAMING;
    +
    + if (intel_crtc->pipe == 1)
    + intel_dp->DP |= DP_PIPEB_SELECT;
    +
    + if (is_cpu_edp(intel_dp)) {
    + /* don't miss out required setting for eDP */
    + intel_dp->DP |= DP_PLL_ENABLE;
    + if (adjusted_mode->clock < 200000)
    + intel_dp->DP |= DP_PLL_FREQ_160MHZ;
    + else
    + intel_dp->DP |= DP_PLL_FREQ_270MHZ;
    + }
    + } else {
    + intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
    }
    }

    --
    keith.packard@intel.com
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