Messages in this thread | | | Date | Wed, 2 Nov 2011 19:24:14 +0530 | From | Srivatsa Vaddagiri <> | Subject | Re: [Patch] Idle balancer: cache align nohz structure to improve idle load balancing scalability |
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* Suresh Siddha <suresh.b.siddha@intel.com> [2011-11-01 16:52:38]:
> + /* > + * We were recently in tickless idle mode. We will do the delayed > + * update of busy mode now (first busy tick after returning from idle). > + */ > + if (unlikely(rq->tick_stopped)) { > + cpumask_clear_cpu(cpu, nohz.idle_cpus_mask); > + > + if (cpumask_bits(nohz.idle_cpus_mask)[BIT_WORD(cpu)] == 0 && > + cpumask_empty(nohz.idle_cpus_mask)) > + clear_bit(NOHZ_NEED_BALANCING, &nohz.bits);
Can't this clear_bit race with set_bit() in select_nohz_load_balancer()?
CPU0 CPU1
cpumask_clear_cpu() if ( ...) cpumask_set_cpu(); set_bit();
clear_bit();
?
- vatsa
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