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    SubjectRe: [PATCH 07/12] perf_events: add LBR software filter support for Intel X86
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    On Fri, 2011-10-07 at 20:25 +0900, Masami Hiramatsu wrote:
    > Oops, I've thought existing code is only for kernel. Hmm, I guess
    > this could cause a problem when running 32bit binary on x86-64.
    >
    I queued below.
    >
    ---
    Subject: perf, x86: Fix PEBS instruction unwind
    From: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Date: Fri Oct 07 13:36:40 CEST 2011

    Masami spotted that we always try to decode the instruction stream as
    64bit instructions when running a 64bit kernel, this doesn't work for
    ia32-compat proglets.

    Use TIF_IA32 to detect if we need to use the 32bit instruction
    decoder.

    Reported-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
    Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
    ---
    arch/x86/kernel/cpu/perf_event_intel_ds.c | 6 +++++-
    1 file changed, 5 insertions(+), 1 deletion(-)

    Index: linux-2.6/arch/x86/kernel/cpu/perf_event_intel_ds.c
    ===================================================================
    --- linux-2.6.orig/arch/x86/kernel/cpu/perf_event_intel_ds.c
    +++ linux-2.6/arch/x86/kernel/cpu/perf_event_intel_ds.c
    @@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struc
    unsigned long from = cpuc->lbr_entries[0].from;
    unsigned long old_to, to = cpuc->lbr_entries[0].to;
    unsigned long ip = regs->ip;
    + int is_64bit = 0;

    /*
    * We don't need to fixup if the PEBS assist is fault like
    @@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struc
    } else
    kaddr = (void *)to;

    - kernel_insn_init(&insn, kaddr);
    +#ifdef CONFIG_X86_64
    + is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
    +#endif
    + insn_init(&insn, kaddr, is_64bit);
    insn_get_length(&insn);
    to += insn.length;
    } while (to < ip);



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