lkml.org 
[lkml]   [2011]   [Oct]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 1/5 v13] arm: omap: usb: ehci and ohci hwmod structures for omap4
Hi,

On Mon, Oct 10, 2011 at 03:55:30PM -0400, Alan Stern wrote:
> On Mon, 10 Oct 2011, Felipe Balbi wrote:
>
> > On Mon, Oct 10, 2011 at 11:19:43AM -0400, Alan Stern wrote:
> > > On Mon, 10 Oct 2011, Felipe Balbi wrote:
> > >
> > > > > > do we have sibling structures today? I dont think so.
> > > > >
> > > > > no we don't.
> > > >
> > > > Ok, here's a first shot at it:
> > >
> > > In fact we do already have sibling lists. They are maintained as part
> > > of the device_private structure. What we are missing is a
> > > device_for_each_sibling() routine. It could be added pretty easily; it
> > > would be similar to device_for_each_child().
> >
> > care to point out where is ?
> >
> > 68 struct device_private {
> > 69 struct klist klist_children;
> > 70 struct klist_node knode_parent;
> -------------^ Here. The "parent" in the name refers to where the
> head of the list is stored.
>
> > 71 struct klist_node knode_driver;
> > 72 struct klist_node knode_bus;
> > 73 void *driver_data;
> > 74 struct device *device;
> > 75 };
>
> From device_add():
>
> if (parent)
> klist_add_tail(&dev->p->knode_parent,
> &parent->p->klist_children);

that's a parent -> child relationship. What we have on this case is:

-------------- ---------------
| | | | |\
| UHH | clocks, etc | USBTLL | | |
| | <==========> | | <======> | | <====> ports
| ------- | | (Transceiver- | | |
| | EHCI | | | less Link) | |/
| ------- | | | Port MUX
| | | |
| ------- | | |
| | OHCI | | | |
| ------- | | |
| | | |
-------------- ---------------

It doesn't shown here, but the TLL link is completely optional. It's
mainly used for modem integration, IIRC. Still, if we're using TLL, EHCI
and OHCI will depend on a clock provided by the USBTLL block.

Clearly, USBTLL isn't either a parent of UHH, nor a parent of EHCI/OHCI
blocks. We can, from a code perspective, make USBTLL into a parent of
UHH to make things simpler, but this will mean that calling
pm_runtime_get() will also unconditionaly turn on TLL clock, unless we
add some nasty hacks to allow TLL know if *HCI port is in TLL mode.

That's why I decided for making TLL and UHH siblings, because that's a
closer relationship than parent-child.

Can you see the problem now ?

ps: the best picture is on TI's OMAP4430 TRM (it's publicly available
from TI's website). So, if you want a better rendering of the
integration model, take a look at chapter 23.

--
balbi
[unhandled content-type:application/pgp-signature]
\
 
 \ /
  Last update: 2011-10-10 22:13    [W:0.091 / U:0.356 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site